
Muhammad Zuhaib Akbar
A skilled individual having hands-on experience of over 9 years in all phases of product development for the... | Eindhoven, North Brabant, Netherlands
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Muhammad Zuhaib Akbar’s Emails mu****@wi****.org
Muhammad Zuhaib Akbar’s Phone Numbers No phone number available.
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Muhammad Zuhaib Akbar’s Location Eindhoven, North Brabant, Netherlands
Muhammad Zuhaib Akbar’s Expertise A skilled individual having hands-on experience of over 9 years in all phases of product development for the electronics manufacturing industry. Proven skills and experience to complete multiple FPGA-based system design tasks from its behavioral simulation to its final deployment, Digital Signal Processing algorithm development for multi-range frequency receiver designs, building test-environment for Electronic Hardware to meet industrial quality standards, and leading team to complete a project with time and cost budget. My career aim is to gain a role that allows me to further my expertise and take on increased responsibility at a market-leading electronics product manufacturer. 🔹 FPGA Based System Designing (Xilinx based FPGAs and SOCs and Intel-based FPGAs) 🔹 Verification, Optimization, and Timing closure of RTL Design 🔹 Working on different DSP algorithms and its RTL Implementation FFT, DDS, NCO, Filters, etc 🔹 FPGA Interfacing of RF Front-end hardware (PLLs, Digital Attenuates, etc) and high-speed ADCs. 🔹 Development of Automated Test Environment for FPGA Based Systems.
Muhammad Zuhaib Akbar’s Current Industry Asml
Muhammad
Zuhaib Akbar’s Prior Industry
Futec
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Robotech Engineering
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Paf Kiet
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Pakistan Aeronautical Complex Kamra
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Rwr
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Rwr Private Limted
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Erays Technologies
|
Rapid Silicon
|
Asml
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Work Experience

Asml
FPGA Engineer
Wed May 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time) — Present
Rapid Silicon
Senior FPGA Design Engineer
Sun Oct 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Wed May 01 2024 00:00:00 GMT+0000 (Coordinated Universal Time)
Erays Technologies
Contract Engineer (DSP/FPGA)
Thu Jun 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time) — Fri Sep 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Rwr Private Limted
Senior Design Engineer/Team Lead (Digital Hardware and Signal Processing Group)
Tue Jan 01 2019 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon May 01 2023 00:00:00 GMT+0000 (Coordinated Universal Time)
Rwr
Hardware Design Engineer
Sat Aug 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Dec 01 2018 00:00:00 GMT+0000 (Coordinated Universal Time)
Paf Kiet
LAB Engineer
Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Mon Jun 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Pakistan Aeronautical Complex Kamra
Engineering Intern
Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) — Thu Jan 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time)
Robotech Engineering
Engineering Intern
Sun Jun 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time) — Tue Jul 01 2014 00:00:00 GMT+0000 (Coordinated Universal Time)
Futec
Engineering Intern
Wed May 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time) — Sat Jun 01 2013 00:00:00 GMT+0000 (Coordinated Universal Time)